Communication networks and distributed technologies move people towards the era of ubiquitous computing. An ubiquitous environment needs many authentication sensors for users recognition, in order to provide a secure infrastructure for both user access to resources and services and information management. Today the security requirements must ensure secure and trusted user information to protect sensitive data resource access and they could be used for user traceability inside the platform. Conventional authentication systems, based on username and password, are in crisis since they are not able to guarantee a suitable security level for several applications. Biometric authentication systems represent a valid alternative to the conventional authentication systems providing a flexible e-infrastructure towards an integrated solution supporting the requirement for improved inter-organizational functionality. Automatic fingerprint classification provides an important indexing scheme to facilitate efficient matching in large-scale fingerprint databases in Automatic Fingerprint Identification Systems (AFISs). In this paper, an efficient embedded fingerprint classification architecture based on the fusion of a Weightless Neural Network architecture and a technique, namely Virtual Neuron, implementing an efficient mapping of a neural network architecture into a hardware device, is presented. The key novelty of the proposed paper is a new neural-based classification methodology that can leverage devices with limited number of resources, allowing for resource-efficient hardware implementations. Furthermore, the efficiency and the accuracy have been optimized to obtain high classification rate with the best trade-off between minimum area on chip and execution time. The proposed neural architecture analyzes directional images, extracted without any pre-processing enhancement on the original fingerprint images, to classify the fingerprints into the five NIST Biometric Image Software (NBIS) classes. This approach has been designed for FPGA devices, by exploiting pipeline techniques in order to reduce the execution time. Experimental results, based on a 10-fold cross-validation strategy, denote an overall average classification rate of 90.08% on the whole official FVC2002DB2 database proposing an efficient embedded solution in terms of both hardware resources and execution time.

Resource-Efficient Hardware Implementation of a Neural-based Node for Automatic Fingerprint Classification

Vincenzo Conti
;
2017-01-01

Abstract

Communication networks and distributed technologies move people towards the era of ubiquitous computing. An ubiquitous environment needs many authentication sensors for users recognition, in order to provide a secure infrastructure for both user access to resources and services and information management. Today the security requirements must ensure secure and trusted user information to protect sensitive data resource access and they could be used for user traceability inside the platform. Conventional authentication systems, based on username and password, are in crisis since they are not able to guarantee a suitable security level for several applications. Biometric authentication systems represent a valid alternative to the conventional authentication systems providing a flexible e-infrastructure towards an integrated solution supporting the requirement for improved inter-organizational functionality. Automatic fingerprint classification provides an important indexing scheme to facilitate efficient matching in large-scale fingerprint databases in Automatic Fingerprint Identification Systems (AFISs). In this paper, an efficient embedded fingerprint classification architecture based on the fusion of a Weightless Neural Network architecture and a technique, namely Virtual Neuron, implementing an efficient mapping of a neural network architecture into a hardware device, is presented. The key novelty of the proposed paper is a new neural-based classification methodology that can leverage devices with limited number of resources, allowing for resource-efficient hardware implementations. Furthermore, the efficiency and the accuracy have been optimized to obtain high classification rate with the best trade-off between minimum area on chip and execution time. The proposed neural architecture analyzes directional images, extracted without any pre-processing enhancement on the original fingerprint images, to classify the fingerprints into the five NIST Biometric Image Software (NBIS) classes. This approach has been designed for FPGA devices, by exploiting pipeline techniques in order to reduce the execution time. Experimental results, based on a 10-fold cross-validation strategy, denote an overall average classification rate of 90.08% on the whole official FVC2002DB2 database proposing an efficient embedded solution in terms of both hardware resources and execution time.
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11387/128528
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