IRIS
PALESI, MAURIZIO
 Distribuzione geografica
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Continente #
EU - Europa 3.913
NA - Nord America 3.779
AS - Asia 596
Continente sconosciuto - Info sul continente non disponibili 17
Totale 8.305
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Nazione #
US - Stati Uniti d'America 3.570
IE - Irlanda 1.441
UA - Ucraina 777
FR - Francia 581
GB - Regno Unito 436
DE - Germania 205
CA - Canada 204
CN - Cina 193
SG - Singapore 181
SE - Svezia 163
CH - Svizzera 130
HK - Hong Kong 112
FI - Finlandia 98
IN - India 45
IR - Iran 22
IT - Italia 19
EU - Europa 17
KR - Corea 17
RU - Federazione Russa 15
TR - Turchia 12
CZ - Repubblica Ceca 11
BE - Belgio 8
NL - Olanda 7
DK - Danimarca 6
IL - Israele 5
MX - Messico 4
ES - Italia 3
HU - Ungheria 3
PL - Polonia 3
AZ - Azerbaigian 2
BN - Brunei Darussalam 2
JP - Giappone 2
RO - Romania 2
AM - Armenia 1
BG - Bulgaria 1
EE - Estonia 1
IM - Isola di Man 1
LV - Lettonia 1
NP - Nepal 1
PR - Porto Rico 1
SK - Slovacchia (Repubblica Slovacca) 1
VN - Vietnam 1
Totale 8.305
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Città #
Dublin 1.437
Chandler 905
Jacksonville 773
London 412
Boardman 274
Toronto 193
Beijing 142
Singapore 132
Zurich 130
Santa Clara 127
Princeton 124
Wilmington 120
Hong Kong 112
Helsinki 97
Ashburn 84
Chicago 67
Dearborn 59
Cedar Knolls 35
Norwalk 22
Des Moines 17
Seoul 17
Leawood 16
Pune 15
Edinburgh 14
Cambridge 13
Kocaeli 12
Brno 11
Augusta 10
Bremen 10
Ardabil 9
Kunming 9
San Mateo 9
Brussels 8
Los Angeles 8
Milan 8
Monmouth Junction 8
Zanjan 8
Ottawa 7
Amsterdam 6
Copenhagen 6
Fairfield 6
Las Vegas 6
Munich 6
Nanjing 6
Redmond 6
Frankfurt am Main 5
Guangzhou 5
Hefei 5
Ann Arbor 4
Falkenstein 4
Fresnillo 4
Saint Petersburg 4
Andover 3
Bangalore 3
Budapest 3
Dalsjoefors 3
Glasgow 3
Nanchang 3
Sacramento 3
Seattle 3
Tel Aviv 3
Warsaw 3
Atlanta 2
Azor 2
Baku 2
Bandar Seri Begawan 2
Borås 2
Clifton 2
Hebei 2
Henderson 2
Jaipur 2
Jinan 2
Madrid 2
Manchester 2
Moscow 2
New York 2
Newark 2
Ningbo 2
San Francisco 2
Tokyo 2
Berlin 1
Bucharest 1
Chaoyang 1
Chongqing 1
Clayton 1
Douglas 1
Esslingen am Neckar 1
Falkirk 1
Fuzhou 1
Gatchina 1
Geislingen an der Steige 1
Hanoi 1
Hanover 1
Huizen 1
Izhevsk 1
Jinhua 1
Kathmandu 1
La Canada Flintridge 1
Marseille 1
Miami 1
Totale 5.613
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Nome #
A genetic approach to bus encoding 135
A genetic bus encoding technique for power optimization of embedded systems 135
A Framework for Design Space Exploration of Parameterized VLSI Systems 134
2015 IEEE 26th International Conference on Application-specific Systems, Architectures and Processors (ASAP) 133
A Communication-Aware Topological Mapping Technique for NoCs 129
Special Section on ESTIMedia’13 129
A GA Based Design Space Exploration Framework for Parameterized System-on-a-Chip Platforms 125
On Self-tuning Networks-on-Chip for Dynamic Network-Flow Dominance Adaptation 122
Introduction to the special section on ESTIMedia'12 119
Reducing Complexity of Multi-objective Design Space Exploration in VLIW-based Embedded Systems 116
Introduction to the special section on on-chip and off-chip network architectures 115
HARAQ: Congestion-Aware Learning Model for Highly Adaptive Routing Algorithm in On-Chip Networks 113
Editorial 112
Cycle-Accurate Network on Chip Simulation with Noxim 110
Exploiting Data Resilience in Wireless Network-on-chip Architectures 109
Bandwidth Aware Routing Algorithms for Networks-on-Chip Platforms 94
A new selection policy for adaptive routing in network on chip 91
A Method for Router Table Compression for Application Specific Routing in Mesh Topology NoC Architectures 87
A Multi-Level Routing Scheme and Router Architecture to support Hierarchical Routing in Large Network on Chip Platforms 84
A Multiobjective Genetic Fuzzy Approach for Intelligent System-level Exploration in Parameterized VLIW Processor Design 84
Efficient Design Space Exploration for Application Specific Systems-on-a-Chip 83
Run-time Deadlock Detection in Networks-on-Chip using Coupled Transitive Closure Networks 80
Bandwidth Aware Routing Algorithms for Networks-on-Chip 80
An evolutionary approach for reducing the switching activity in address buses 80
Power-Aware Selection Policy for Networks on Chip 79
Multi-Objective Optimization of a Parameterized VLIW Architecture 79
Improving Wormhole Adaptive Routing in Networks on Chip 78
Network-on-chip architectures and design methodologies 78
Runtime Tunable Transmitting Power Technique in mm-Wave WiNoC Architectures 78
Networks-on-Chip: Emerging Research Topics and Novel Ideas 76
Design Space Exploration Methodologies for IP-based System-on-a-chip 73
An Evolutionary Approach to Network on Chip Mapping Problem 73
A Multi-objective Genetic Approach to Mapping Problem on Network-on-Chip 73
A Methodology for Design of Application Specific Deadlock-free Routing Algorithms for NoC Systems 72
Design of Bandwidth Aware and Congestion Avoiding Efficient Routing Algorithms for Networks-on-Chip Platforms 71
A Novel Approach to Design Space Exploration of Parameterized SOCs 71
An Efficent Hierachical Fuzzy Approach for System Level System-on-a-Chip Design 71
Data Encoding for Low-Power in Wormhole-Switched Networks-on-Chip 70
Analysis and Tools for the Design of VLIW Embedded Systems in a Multi-objective Scenario 70
An Effective Methodology to Multi-objective Design of Application Domain-specific Embedded architectures 70
Low Latency and Energy Efficient Multicasting Schemes for 3D NoC-based SoCs 69
Tuning methodologies for parameterized systems design 69
Parameterised System Design Based on Genetic Algorithms 68
A Multi-objective Strategy for Concurrent Mapping and Routing in Networks on Chip 68
Multi-objective design space exploration using genetic algorithms 67
An evolutionary Approach for reducing the energy in address buses 67
Multiobjective Genetic Approach for System-Level Exploration in Parameterized Systems-on-a-Chip 66
Exploring Design Space of VLIW Architectures 66
Message from the Chairs 66
Hyperblock formation: a power/energy perspective for high performance VLIW architectures 66
A system-level framework for evaluating area/performance/power trade-offs of VLIW-based embedded systems 66
Application Specific Routing Algorithms for Low Power Network on Chip Design 65
Leveraging Partially Faulty Links Usage for Enhancing Yield and Performance in Networks on Chip 65
High Performance Computing for Embedded System Design: A Case Study 65
Adaptive Power Allocation for Many-core Systems Inspired from A Multi-agent Auction Model 65
Region-Based Routing: A Mechanism to Support Efficient Routing Algorithms in NoCs 64
An evolutionary approach for Pareto-optimal configurations in SOC platforms 64
An Efficient Radio Access Control Mechanism for Wireless Network-On-Chip Architectures 64
An Encoding Scheme to Reduce Power Consumption in Networks-on-Chip 63
Multi-objective mapping for mesh-based NoC architectures 62
An adaptive output selection function based on a fuzzy rule base system for Network on Chip 62
An Adaptive Routing Technique Supporting In-Order Packet Delivery in Networks on Chip 61
Neighbors-on-Path: A New Selection Strategy for On-Chip Networks 61
Improving the Teaching Effectiveness in an Introductory Computer Architecture Course 60
Tuning methodologies for parameterized systems design 60
Introduction to the special issue on “Emerging research in Internet of Things” 59
Deadlock Free Routing Algorithms for Mesh Topology NoC Systems with Regions 58
EPIC-Explorer: A parameterized VLIW-based platform framework for design space exploration 58
Editorial on Special issue on energy efficient methods and systems in the emerging cloud era 58
Fuzzy Decision Making in Embedded System Design 57
A closed loop transmitting power self-calibration scheme for energy efficient WiNoC architectures 57
Noxim: An open, extensible and cycle-accurate network on chip simulator 57
Data Encoding Schemes in Networks on Chip 57
An hybrid approach for automatic gait events detection using a triaxial accelerometer sensor 56
Efficient Congestion-Aware Scheme for Wireless on-Chip Networks 56
An Instruction-Level Power Analysis Model with Data Dependency 56
Performance Evaluation of Efficient Multi-Objective Evolutionary Algorithms for Design Space Exploration of Embedded Computer Systems 55
Many-core System-on-Chip: architectures and applications 55
HiRA: A Methodology for Deadlock Free Routing in Hierarchical Networks on Chip 54
Editorial of the Special issue on Many-core Embedded Systems 54
Efficient Application Specific Routing Algorithms for NoC Systems utilizing Partially Faulty Links 52
Multi-Objective Evolutionary Fuzzy Clustering for High-Dimensional Problems 52
Guest Editors’ Introduction to the Special Issue on Novel On-Chip Parallel Architectures and Software Support 52
An Adaptive Transmitting Power Technique for Energy Efficient mm-Wave Wireless NoCs 52
On-Chip Communication Energy Reduction through Reliability Aware Adaptive Voltage Swing Scaling 52
Improved Flow Control for Minimal Fully Adaptive Routing in 2D Mesh NoC 52
An Offline Method for Designing Adaptive Routing Based on Pressure Model 52
Switching Activity Reduction in Embedded Systems: A Genetic Bus Encoding Approach 52
Power-Aware Run-Time Incremental Mapping for 3-D Networks-on-Chip 51
Power-Efficient, High Performance General Purpose and Application Specific Computing Architectures 51
NoC Links Energy Reduction through Link Voltage Scaling 51
Coupling Routing Algorithm and Data Encoding for Low Power Networks on Chip 51
Introduction to the special issue on NoC-based many-core architectures 50
Power/Energy Perspective on Hyperblock Formation 49
Low Energy Mapping Techniques under Reliability and Bandwidth Constraints 49
On Self-Tuning Networks-on-Chip for Dynamic Network-Flow Dominance Adaptation 49
Introduction to the Special Issue on Network-on-Chip Architectures 49
A Closed Loop Control based Power Manager for WiNoC Architectures 49
Supporting Undergraduate Computer Architecture Students Using a Visual MIPS64 CPU Simulator 48
Special issue on emerging on-chip networks and architectures [Editorial] 48
Totale 7.258
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Categoria #
all - tutte 55.663
article - articoli 0
book - libri 0
conference - conferenze 0
curatela - curatele 0
other - altro 0
patent - brevetti 0
selected - selezionate 0
volume - volumi 0
Totale 55.663
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Totale Lug Ago Sett Ott Nov Dic Gen Feb Mar Apr Mag Giu
2019/2020799 0 0 0 0 0 228 101 200 89 27 153 1
2020/20211.034 126 0 124 124 6 127 1 179 1 139 67 140
2021/2022814 3 11 8 267 0 1 11 119 40 89 48 217
2022/20232.857 288 301 167 439 327 344 74 266 327 64 206 54
2023/20241.528 91 192 110 81 242 64 409 90 32 39 40 138
2024/2025489 46 63 147 19 177 37 0 0 0 0 0 0
Totale 8.377